Semiconductor photodetection device, radiation counting device, and control method of semiconductor photodetection device

ABSTRACT

Noise of signals in an image sensor is reduced. A pixel circuit generates a reset signal of a predetermined initial voltage and an exposure signal of a signal voltage according to an exposure amount of light in order. An analog-digital conversion unit performs a reset sampling process of converting the reset signal into a first digital signal at a predetermined reset sampling interval and an exposure sampling process of converting the exposure signal into a second digital signal at an exposure sampling interval that does not exceed twice the predetermined reset sampling interval in order. A detection unit detects the light based on the first digital signal and a second digital signal.

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a national stage application under 35 U.S.C. 371 andclaims the benefit of PCT Application No. PCT/JP2015/069097 having aninternational filing date of 2 Jul. 2015, which designated the UnitedStates, which PCT application claimed the benefit of Japanese PatentApplication No. 2014-165767 filed 18 Aug. 2014, the disclosures of whichare incorporated herein by reference in their entirety.

TECHNICAL FIELD

The present technology relates to a semiconductor photodetection device,a radiation counting device, and a control method of the semiconductorphotodetection device. The technology relates particularly to asemiconductor photodetection device which performs correlated doublesampling, a radiation counting device, and a control method of thesemiconductor photodetection device.

BACKGROUND ART

In recent years, complementary metal-oxide semiconductor (CMOS) imagershave been widely used in digital still cameras, camcorders, surveillancecameras, and the like, and also the market thereof has increasinglyexpanded. In such a CMOS imager, pixels convert incident light intoelectrons using photodiodes. Then, the pixels accumulate the electronsfor a given period, and then output signals reflecting the amount ofaccumulated electric charge to an analog-to-digital (A/D) converterbuilt into a chip via amplifier elements disposed in the pixels. The A/Dconverter digitizes the signal from the pixels, and then outputs thedigitized signal to an image processing circuit of a signal processingcircuit at the following stage. In the CMOS imager, such pixels aredisposed in a matrix shape for imaging (refer to, for example, PatentLiterature 1).

To read a signal from such a pixel, the CMOS imager performs thefollowing operation. That is, before accumulated electric charge istransferred to an input node (a floating diffusion layer, etc.) of anamplifier element within the pixel, the CMOS imager resets the input to,for example, a voltage of a power supply to make it float. At this time,reset noise (kTC noise) occurs in the input node of the amplifier, andthus the CMOS imager reads a reset signal of this reset state from thepixel, and performs sampling on the result to set it as a referencesignal. Subsequently, the CMOS imager transfers the accumulated electriccharge, reads a signal thereof from the pixel as an exposure signal, andthen performs sampling thereon. Then, the CMOS imager takes thedifference between the sampled signals, and offsets the kTC noise. Thissignal processing is called correlated double sampling (CDS).

Here, the signal output from each pixel through sampling includes randomnoise of the amplifier element disposed in the pixel or random noise ofa detection circuit itself. As a method of reducing such random noise, amethod of performing sampling a plurality of times on the reset signaland the exposure signal in the correlated double sampling and adding oraveraging the results is effective. In this manner, performing samplingon the reset signal or the exposure signal a plurality of times incorrelated double sampling will be hereinafter referred to as multiplesampling.

CITATION LIST Patent Literature

Patent Literature 1: JP 2011-97581A

DISCLOSURE OF INVENTION Technical Problem

When the above-described CMOS imager is used in photon counting, or thelike, it is required that pixels generate complete low noise anddetection of ultra weak light be possible. A problem in this case is 1/fnoise of pixel amplifiers. Here, 1/f noise is noise that has increasingnoise power as a frequency becomes lower. Noise of a high frequency bandbeginning from thermal noise can be reduced through a band cut using adetection circuit or the above-described multiple sampling, but reducingnoise components of a low frequency band is difficult. For this reason,it is difficult to reduce 1/f noise which has a lot of noise componentsalso in low frequency bands.

The present technology takes the above circumstances into account, andthus aims to reduce noise of signals in an image sensor.

Solution to Problem

The present technology is achieved for solving the above-mentionedproblem, and a first aspect of the present technology is to provide asemiconductor photodetection device including: a pixel circuitconfigured to generate a reset signal of a predetermined initial voltageand an exposure signal of a signal voltage according to an exposureamount of light in order; an analog-digital conversion unit configuredto perform a reset sampling process of converting the reset signal intoa first digital signal at a predetermined reset sampling interval and anexposure sampling process of converting the exposure signal into asecond digital signal at an exposure sampling interval that does notexceed twice the predetermined reset sampling interval in order; and adetection unit configured to detect the light based on the first digitalsignal and a second digital signal, and a method of controlling thesame. Accordingly, the effect that the exposure signal is converted intothe digital signal at the exposure sampling interval that does notexceed twice the reset sampling interval is exhibited.

According to the first aspect, the exposure sampling interval may be avalue that is 0.7 to 2.0 times the reset sampling interval. Accordingly,the effect that the exposure signal is converted into the digital signalat the exposure sampling interval that is 0.7 to 2.0 times the resetsampling interval is exhibited.

According to the first aspect, the exposure sampling interval may be avalue that is 0.7 to 1.5 times the reset sampling interval. Accordingly,the effect that the exposure signal is converted into the digital signalat the exposure sampling interval that is 0.7 to 1.5 times the resetsampling interval is exhibited.

According to the first aspect, the exposure sampling interval may be asubstantially identical value as the reset sampling interval.Accordingly, the effect that the exposure signal is converted into thedigital signal at the exposure sampling interval that is the same as thereset sampling interval is exhibited.

According to the first aspect, the analog-digital conversion unit mayinclude: a comparison unit configured to perform a process of comparinga voltage of a first sweep signal whose voltage changes at a constantrate after a timing of sampling of the reset signal elapses and avoltage of the reset signal, and a process of comparing a voltage of asecond sweep signal whose voltage changes at a constant rate after atiming of sampling of the exposure signal elapses and a voltage of thereset signal in order; and a counter configured to count a count valueaccording to a result obtained by the comparison performed by thecomparison unit and supply a signal of the count value as the digitalsignal, and amounts of change of the respective first sweep signal andsecond sweep signal may be identical. Accordingly, the effect that thevoltages of the respective first sweep signal and reset signal arecompared and the voltages of the respective second sweep signal havingthe same sweep amount as the first sweep signal and exposure signal arecompared is exhibited.

According to the first aspect, the analog-digital conversion unit mayconvert the reset signal into the first digital signal a number of timesmore than three times, and may convert the exposure signal into thesecond digital signal a number of times more than three times.Accordingly, the effect that the reset signal and the exposure signalare converted into the digital signals a number of times more than threetimes is exhibited.

According to the first aspect, the detection unit may detect the lightbased on the difference between the first digital signal and the seconddigital signal. Accordingly, the effect that light is detected based onthe difference between the first digital signal and the second digitalsignal is exhibited.

According to the first aspect, the detection unit may detect the lightbased on whether a value according to the difference exceeds apredetermined threshold value. Accordingly, the effect that light isdetected based on whether or not a value according to the differenceexceeds the predetermined threshold value is exhibited.

According to the first aspect, the detection unit may calculate astatistic of the difference as a detection result of the light.Accordingly, the effect that a statistic of the difference is calculatedas a detection result of light is exhibited.

A second aspect of the present technology is to provide a radiationcounting device including: a scintillator configured to emitscintillation light when a radiation enters; a pixel circuit configuredto generate a reset signal of a predetermined initial voltage and anexposure signal of a signal voltage according to an exposure amount ofthe scintillation light; an analog-digital conversion unit configured toperform a reset sampling process of converting the reset signal into afirst digital signal at a predetermined reset sampling interval and anexposure sampling process of converting the exposure signal into asecond digital signal at an exposure sampling interval that does notexceed twice the predetermined reset sampling interval in order; and adetection unit configured to detect the light based on the first digitalsignal and the second digital signal. Accordingly, the effect that theexposure signal is converted into the digital signal at the exposuresampling interval that does not exceed twice the reset sampling intervalis exhibited.

Advantageous Effects of Invention

According to the present technology, an excellent effect that noise ofsignals can be reduced in an image sensor can be exhibited. Note thateffects described herein are not necessarily limitative, and include anyeffect described in the present disclosure.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram showing an example of a configuration of animage sensor according to a first embodiment.

FIG. 2 is a circuit diagram showing an example of a configuration of apixel circuit according to the first embodiment.

FIG. 3 is a timing chart showing an example of an operation of the pixelcircuit according to the first embodiment.

FIG. 4 is a diagram showing examples of a functional configuration of adetection circuit and an operation of the detection circuit according tothe first embodiment.

FIG. 5 is a timing chart showing an example of an operation of the imagesensor according to the first embodiment.

FIG. 6 is a graph showing an example of a relation between a samplinginterval and noise power density according to the first embodiment.

FIG. 7 is a graph showing an example of a relation between a frequencyand noise power density according to the first embodiment.

FIG. 8 is a timing chart showing an example of an operation of an imagesensor according to a first modified example of the first embodiment.

FIG. 9 is a diagram showing an example of a configuration of a detectioncircuit according to a second modified example of the first embodiment.

FIG. 10 is a diagram showing an example of a configuration of aradiation counting device according to a second embodiment.

MODE(S) FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments for implementing the present technology(hereinafter referred to as embodiments) will be described. Descriptionwill be provided in the following order.

1. First embodiment (Example in which exposure sampling interval is setto be no more than twice reset sampling interval)

2. Second embodiment (Example in which radiation counting is performedby setting exposure sampling interval to be no more than twice resetsampling interval)

<1. First Embodiment>

[Example of Configuration of Image Sensor]

FIG. 1 is a block diagram showing an example of a configuration of animage sensor 100 according to a first embodiment. This image sensor 100includes a plurality of constant current circuits 110, a row drivecircuit 120, a pixel array unit 130, a timing control circuit 150, areference voltage supply unit 160, a plurality of detection circuits170, a plurality of switches 185, and an output circuit 190. Note thatthe image sensor 100 is an example of the semiconductor photodetectiondevice described in the claims.

The pixel array unit 130 has a plurality of pixel circuits 140 arrayedin a two-dimensional matrix shape. A plurality of pixel circuits 140arrayed in a predetermined direction will be hereinafter referred to asa “row,” and a plurality of pixel circuits 140 arrayed in a directionvertical to a row will be hereinafter referred to as a “column.” Each ofthe aforementioned constant current circuits 110, detection circuits170, and switches 185 is provided in each column.

Each pixel circuit 140 converts light into an analog electric signalaccording to control of the row drive circuit 120. The pixel circuit 140supplies the electric signal to the corresponding detection circuit 170via a vertical signal line 149. This electric signal includes theabove-mentioned reset signal or exposure signal.

The row drive circuit 120 controls each of the pixel circuits 140 via aplurality of control lines according to control of the timing controlcircuit 150. This row drive circuit 120 selects rows in order, exposesselected rows to light, and causes electric signals (reset signals oraccumulation signals) to be output from the pixel circuits 140 of rowsthat have undergone light exposure. These electric signals are read bythe detection circuits 170. In this manner, the control of exposing therows to light in order is called a rolling shutter method. The controlperformed at the time of the exposure and reading will be describedbelow in more detail.

Each constant current circuit 110 generates a constant current, andsupplies it to a corresponding vertical signal line 149.

The timing control circuit 150 controls operation timings of the rowdrive circuit 120, the reference voltage supply unit 160, and thedetection circuits 170. This timing control circuit 150, for example,generates a timing control signal indicating a row scanning timing, andsupplies the signal to the row drive circuit 120. In addition, thetiming control circuit 150 generates a digital-to-analog (DAC) controlsignal to control an operation of supplying a reference voltage, andsupplies the signal to the reference voltage supply unit 160. Further,the timing control circuit 150 supplies a detection control signal tocontrol an operation of each detection circuit 170 to the detectioncircuit 170. The DAC control signal and the detection control signalwill be described below in more detail.

The reference voltage supply unit 160 generates the reference voltageV_(ref) according to the DAC control signal, and supplies it to each ofthe detection circuits 170.

Each detection circuit 170 performs photodetection based on an electricsignal according to the detection control signal. The detection circuit170 performs a correlated double sampling (CDS) process on these signalsto detect light. The detection circuit 170 supplies a digital signalindicating the detection result to each switch 185.

Each switch 185 opens or closes a path between its correspondingdetection circuit 170 and the output circuit 190. The switches 185 inthe respective columns sequentially supply digital signals to the outputcircuit 190 according to control of a column drive circuit (notillustrated) which sequentially selects the columns.

The output circuit 190 outputs the digital signals to an imageprocessing device or the like.

[Example of Configuration of Pixel Circuit]

FIG. 2 is a circuit diagram showing an example of a configuration of apixel circuit 140 according to the first embodiment. This pixel circuit140 includes a photodiode 141, an accumulation node 142, a transfertransistor 143, a detection node 144, a reset transistor 145, anamplifier transistor 146, and a selection transistor 147. An n-typemetal-oxide semiconductor field-effect transistor (MOSFET), for example,is used as the transfer transistor 143. n-type MOSFETs or the likesimilar thereto may be used for the reset transistor 145, the amplifiertransistor 146, and the selection transistor 147.

The photodiode 141 converts light into electric charge. This photodiode141 is connected to the transfer transistor 143 via the accumulationnode 142. The photodiode 141 generates pairs of electrons and holes fromphotons incident on a silicon substrate of the pixel circuit 140, andaccumulates electrons among them in the accumulation node 142.

The transfer transistor 143 transfers the electric charge from theaccumulation node 142 to the detection node 144 according to control ofthe row drive circuit 120.

The detection node 144 accumulates the electric charge from the transfertransistor 143 and generates a voltage according to the amount of theaccumulated electric charge. A floating diffusion layer, for example, isused as the detection node 144. This voltage is applied to the gate ofthe amplifier transistor 146.

The reset transistor 145 draws the electric charge accumulated in theaccumulation node 142 and the detection node 144out to a power supplyfor initialization. The gate of this reset transistor 145 is connectedto the row drive circuit 120, the drain thereof is connected to thepower supply, and the source thereof is connected to the detection node144.

The row drive circuit 120, for example, controls the reset transistor145 to be simultaneously in an on-state with the transfer transistor 143to draw the electrons accumulated in the accumulation node 142out to thepower supply, and initializes the pixel to be in a dark state before theaccumulation, i.e., in a no-light incidence state. In addition, the rowdrive circuit 120 controls only the transfer transistor 143 to be in anon-state to draw the electric charge accumulated in the detection node144out to the power supply and initializes the amount of the electriccharge.

The amplifier transistor 146 amplifies a voltage of a gate. The gate ofthe amplifier transistor 146 is connected to the detection node 144, thedrain thereof is connected to the power supply, and the source thereofis connected to the selection transistor 147. The amplifier transistor146 and the constant current circuit 110 form a source follower, and avoltage of the detection node 144 is output to the vertical signal line149 with a gain of slightly less than 1. The electric signal of thevoltage is acquired by the detection circuit 170.

The selection transistor 147 outputs an electric signal according tocontrol of the row drive circuit 120. The gate of the selectiontransistor 147 is connected to the row drive circuit 120, the drainthereof is connected to the amplifier transistor 146, and the sourcethereof is connected to the vertical signal line 149. The row drivecircuit 120 selects one row, turns all selection transistors 147 in theselected row on, and thereby causes the electric signal to be output topixel circuits 140 in the row.

In addition, the constant current circuit 110 has, for example, an MOStransistor 111. The gate of the MOS transistor receives application of apredetermined voltage, the drain thereof is connected to the verticalsignal line 149, and the source thereof is grounded. This constantcurrent circuit 110 is connected to each of pixel circuits 140 in acolumn via the vertical signal line 149.

Such a CMOS imager has had decreased parasitic capacitance inside pixelcircuits due to miniaturization thereof in the recent years, andspecifically, the parasitic capacitance of the detection node 144 ofFIG. 2 is significantly decreased, which improves conversion efficiency,and as a result, improves sensitivity. On the other hand, the quality ofa crystal of a substrate has improved, and thus reduction in noise hasprogressed. That is, a signal-to-noise (S/N) ratio of a signal hassignificantly improved, and due to this trend, there is a possibility ofthis being used as a photodetector that supports ultra-low illuminance.The image sensor 100 is used as a photon counting device with the entirepixel array unit 130 in a chip set as one light receiving surface. Suchdevices are expected to replace photomultiplier tubes, and the like.

Note that the image sensor 100 may be mounted in an imaging device whichdetects natural light to be used in imaging of image data, such as adigital still camera or surveillance camera, rather than being used inphoton counting.

FIG. 3 is a timing chart showing an example of an operation of the pixelcircuit 140 according to the first embodiment.

The row drive circuit 120 controls both the transfer transistor 143 andthe reset transistor 145 to be in an on-state at a timing T1 immediatelybefore an exposure period. Through this control, all electric chargeaccumulated in the accumulation node 142 between the photodiode 141 andthe transfer transistor 143 is discharged to the power supply. Thiscontrol will be hereinafter referred to as a “photodiode (PD) reset.”Thereafter, the row drive circuit 120 controls the transfer transistor143 to be in an off-state. Through this control, the accumulation node142 is brought into a floating state, and accumulation of new electriccharge is started. In addition, the row drive circuit 120 controls thereset transistor 145 to be in an off-state after the PD reset. Note thatthe reset transistor 145 may remain in the on-state during accumulationof electric charge. On the other hand, the selection transistor 147 iscontrolled to be in an off-state in order to enable access to anotherpixel circuit 140 connected to the vertical signal line 149.

Then, the row drive circuit 120 controls the reset transistor 145 andthe selection transistor 147 to be in an on-state at a timing T2 beforean end of the exposure period. Through the control over the selectiontransistor 147, the selected pixel circuit 140 is connected to thevertical signal line 149. In addition, through the control over thereset transistor 145, the detection node 144 that is the input of theamplifier transistor 146 and the power supply are short-circuited.Accordingly, a reference potential is generated in the selected pixelcircuit 140.

When a pulse period elapses from the timing T2, the row drive circuit120 controls the reset transistor 145 to be in an off-state. Throughthis control, a potential of the detection node 144 is coupled with thegate of the reset transistor 145 and thus is lowered from the referencepotential a little bit, which results in a floating state. Furthermore,the detection node 144 at that time generates significant kTC noise.This control will be hereinafter referred to as “FD reset” because afloating diffusion layer is generally used as the detection node 144.

The detection circuit 170 performs sampling a plurality of times (forexample, 4 times) at a given interval d_(s1) for the period from the FDreset to an end of the exposure period. In the sampling, the detectioncircuit 170 converts a signal of a potential of the vertical signal line149 into a digital signal D_(s1) as a reset signal. The interval d_(s1)will be hereinafter referred to as a “reset sampling interval.” Multiplesampling of this reset signal is treated as first reading in correlateddouble sampling.

Then, the row drive circuit 120 controls the transfer transistor 143 tobe in an on-state at a timing T4 at which the exposure period ends.Through this control, the electric charge accumulated in theaccumulation node 142 is transferred to the detection node 144. At thistime, if a potential of the detection node 144 is sufficiently deep,electrons accumulated in the accumulation node 142 are all transferredto the detection node 144, and thus the accumulation node 142 is broughtinto a complete depletion state. When a pulse period elapses from thetiming T4, the row drive circuit 120 controls the transfer transistor143 to be in an off-state. Through this control, the potential of thedetection node 144 is lowered (i.e., the potential becomes shallow) bythe amount of the accumulated electric charge, in comparison to beforedriving of the transfer transistor 143. This lowered voltage isamplified by the amplifier transistor 146 and output to the verticalsignal line 149.

The detection circuit 170 performs sampling a plurality of times (forexample, 4 times) at a given interval d_(s2) for the period from thecontrol of the transfer transistor 143 to be in the off-state to atiming T6. In this sampling, the detection circuit 170 converts a signalof a potential of the vertical signal line 149 into a digital signalD_(s2) as an exposure signal. The interval d_(s1) will be hereinafterreferred to as an “exposure sampling interval.” Multiple sampling ofthis exposure signal is treated as second reading in the correlateddouble sampling.

The detection circuit 170 compares the sampled exposure signal (i.e.,the digital signal D_(s2)) and reset signal (i.e., the digital signalD_(s1)), and determines an amount of incident photons based on thecomparison result. A plurality of digital signals D_(s1) are addedtogether, and the average value thereof is calculated if necessary.Likewise, digital signals D_(s2) are added together and averaged ifnecessary. The detection circuit 170 obtains the difference between thesum value (or the average value) of the digital signals D_(s1) and thesum value (or the average value) of the digital signals D_(s2) as a netexposure signal. The kTC noise generated in the FD reset is offset bytaking the difference between the digital signals D_(s1) and D_(s2).

Here, noise cancellation through CDS is effective not only for fixednoise such as kTC noise but also low frequency noise. A frequency ofnoise at which an offset effect is obtained is dependent on a CDSinterval d_(c), and a corresponding frequency band is a band of about1/d_(c) or lower. The CDS interval is an interval between a samplingtiming of the reset signal and a sampling timing of the exposure signal.On the other hand, a band of noise reduced through multiple sampling isdependent on a sampling interval d_(s), and a cut-off frequency band isa band of about 10/d_(s) or higher. d_(s1) is set as the samplinginterval d_(s) at the time of reset sampling, and d_(s2) is set as thesampling interval d_(s) at the time of exposure sampling.

Due to the above-described properties, if the CDS interval d_(c) is setto be short, its cut-off band expands to a high frequency side, and ifthe sampling interval d_(s) is set to be long, its cut-off band expandsto a low frequency side. On the other hand, the CDS interval d_(c) isregulated by the sampling interval d_(s) in terms of the readingoperation procedure. Thus, if a relation between d_(c) and d_(s) issuitably adjusted by optimizing the reading operation procedure, a noisecut is implemented substantially through the entire band, which alsocontributes to a reduction of 1/f noise. It has been elicited from anestimation using a transfer function, etc., that setting the samplinginterval ds₂ of the exposure signal to be no more than twice thesampling interval ds₁ of the reset signal in a CDS operation iseffective for reducing 1/f noise. The course of this elicitation will bedescribed below in detail.

Note that it is desirable to set the interval between the final samplingtiming of the reset signal and the first sampling timing of the exposuresignal to be as short as possible.

An exposure period of each pixel circuit 140 is a period between a PDreset and a reading operation, and more precisely, a period after thetransfer transistor transitions to an off-state after the PD reset tothe timing T4 at which the transfer transistor is controlled to be on inreading. If photons are incident on the photodiode 141 and electriccharge is generated in the period, the electric charge is the differencebetween the digital signals D_(s1) and D_(s2), and is calculated by thedetection circuit 170 according to the above-described procedure.

[Example of Configuration of Detection Circuit]

FIG. 4 is a diagram showing examples of a functional configuration ofthe detection circuit 170 and an operation of the detection circuit 170according to the first embodiment. a of the drawing is a circuit diagramshowing the example of the functional configuration of the detectioncircuit 170 according to the first embodiment. The detection circuit 170includes an A/D conversion circuit 171, a divider circuit 176, and adetermination circuit 177.

The A/D conversion circuit 171 converts a reset signal and an exposuresignal into digital signals in order (i.e., performs sampling) accordingto control of the timing control circuit 150. This A/D conversioncircuit 171 includes capacitors 172 and 173, a comparator 174, and acounter 175. Note that the A/D conversion circuit 171 is an example ofthe analog-digital conversion unit described in the claims.

The capacitor 172 is connected to a vertical signal line 149 and one oftwo input terminals of the comparator 174, and the capacitor 173 isconnected to the other one of the two input terminals of the comparator174 and a reference signal line 169. In addition, capacitances of thesecapacitors 172 and 173 are substantially the same, and these capacitorsare also called coupling capacitors.

The comparator 174 compares an output voltage V_(p) of the verticalsignal line 149 and a reference voltage V_(ref) of the reference signalline 169. In multiple sampling of the reset signal, a reset level of thereset signal is output as the output voltage V_(p), and in multiplesampling of the exposure signal, a signal level of the exposure signalis output as the output voltage V_(p). The comparator 174 supplies thecomparison result COMP to the counter 175. For example, if the outputvoltage V_(p) is higher than the reference voltage V_(ref), a high-levelcomparison result COMP is output, and if not, a low-level comparisonresult COMP is output. In addition, the comparator 174 has an auto zerofunction of short-circuiting the two input terminals in its inside.

The counter 175 counts a count value based on the comparison result COMPof the comparator 174. This counter 175 can switch between execution of,for example, up-counting to increment a count value and down-counting todecrement a count value.

The detection circuit 170 performs sampling a plurality of times (forexample, 4 times) at a given interval d_(s2) for the period from thecontrol of the transfer transistor 143 to be in the off-state to atiming T6. In this sampling, the detection circuit 170 converts a signalof a potential of the vertical signal line 149 into a digital signalD_(s2) as an exposure signal. The interval d_(s2) will be hereinafterreferred to as an “exposure sampling interval.” Multiple sampling ofthis exposure signal is treated as second reading in the correlateddouble sampling.

When the initialization instruction signal RST is supplied, the counter175 sets a count value to an initial value. In addition, the counter 175performs either up-counting or down-counting according to the switchinstruction signal SW. Furthermore, when the output voltage V_(p) ishigher than the reference voltage V_(ref) (in other words, thecomparison result COMP is a high level), the counter 175 performsup-counting or down-counting in synchronization with the clock signalCLK. The counter 175 supplies a count value CNT to the divider circuit176.

The divider circuit 176 divides the count value CNT into the number oftimes of sampling (for example, 4 times). For example, division isperformed through a bit shift operation, etc. The divider circuit 176supplies the division result to the determination circuit 177 as a pixelsignal.

The determination circuit 177 compares the value of the pixel signal anda predetermined threshold value, and determines presence of incidence ofphotons based on the comparison result. When the value of the pixelsignal is higher than the threshold value, for example, photons aredetermined to have been incident, and when it is not, photons aredetermined not to have been incident. If such photon detection isperformed one time at a sufficiently low error rate, an influence ofrandom noise is substantially completely removed, and thus when ultraweak light is detected like when a far smaller number of photons thanthe number of pixel circuits 140 arrayed in the pixel array unit 130 areincident, a light amount of the number of incident photons can bedetermined with a high accuracy. The determination circuit 177 generatesa digital signal BINOUT of one bit indicating the determination resultand outputs the signal to the output circuit 190 via the switch 185.Note that the divider circuit 176 and the determination circuit 177 arean example of the detection unit described in the claims.

Note that, although the detection circuit 170 performs photon counting,the circuit may not perform photon counting. In that case, for example,the determination circuit 177 is unnecessary, and a division result ofthe divider circuit 176 is output as pixel data.

In addition, although the detection circuit 170 performs division usingthe divider circuit 176, it is not necessary to provide the dividercircuit 176 at all times in order to perform photon counting, and thusthe divider circuit 176 may not be provided.

[Example of Operation of Detection Circuit]

b of FIG. 4 is a diagram showing the example of the operation of thedetection circuit 170 according to the first embodiment. The selectedpixel circuit 140 outputs the reset signal to the vertical signal line149 according to control of the row drive circuit 120 (Step S901).

In addition, two inputs to the comparator 174 are short-circuited due tothe auto zero function of the comparator 174, the amount of the electriccharge of the capacitors 172 and 173 is adjusted accordingly. Thus, thevertical signal line 149 and the reference signal line 169 are broughtinto a state of effective equilibrium (Step S902).

The reference voltage supply unit 160 supplies sweep signals forchanging (reducing) the reference voltage V_(ref) to the referencesignal line 169 at a constant rate a plurality of times. The comparator174 compares the voltage (V_(ref)) of the sweep signal and the resetlevel (V_(p)) of the reset signal. The timing control circuit 150controls the counter 175 to initialize a count value. The counter 175performs counting based on a reversal timing of the comparison resultCOMP. Accordingly, A/D conversion to convert the reset signal into thedigital signal D_(s1) is performed (Step S903).

Through the auto zero operation of Step S902, the voltage V_(p) of thevertical signal line 149 and the voltage V_(ref) of the reference signalline 169 are controlled to be a state of effective equilibrium. For thisreason, the A/D converted voltage in Step S903 is practically an offset(V_(ofs)) generated inside the comparator 174. Such A/D conversion isperformed a plurality of times, and in the A/D conversion, for example,count values are added through down-counting.

Then, the pixel circuit 140 outputs the exposure signal to the verticalsignal line 149 according to control of the row drive circuit 120 (StepS904).

The reference voltage supply unit 160 supplies the sweep signal again aplurality of times, and the comparator 174 compares the voltage of thesweep signal (V_(ref)) and the signal level of the exposure signal(V_(p)). The timing control circuit 150 controls the counter 175 toswitch down-counting to up-counting. The counter 175 performs countingbased on a reversal timing of the comparison result COMP. Accordingly,A/D conversion is performed to convert the exposure signal to thedigital signal D_(s2) (Step S905).

Since the counter 175 switches down-counting to up-counting in StepS905, the difference between the count value of up-counting and thecount value of down-counting is output in Step S905. An offset voltageof the comparator or kTC noise at the time of reset is removed by takingthe difference between the digital signals D_(s1) and D_(s2).

The divider circuit 176 calculates the average value of the differences(CNT) as a net pixel signal, and the determination circuit 177 comparesthe average value and the threshold value to detect presence ofincidence of photons (Step S906). After Step S906, the detection circuit170 finishes the detection operation.

[Example of Operation of Image Sensor]

a of FIG. 5 is a timing chart showing an example of an operation of theimage sensor 100 according to the first embodiment.

In Step T2, the row drive circuit 120 performs FD reset. At a timing T2′that is reached after a pulse period elapses from the timing T2, thepixel circuit 140 outputs a reset signal via the vertical signal line149. In addition, the timing control circuit 150 supplies theinitialization instruction signal RST to the counter 175 at the timingT2 to initialize a count value.

Here, due to the auto zero function of the comparator 174, voltages ofthe respective vertical signal line 149 and reference signal line 169are in a state of substantially effective equilibrium at the timing T2′.The dot-and-dash line of a of the drawing indicates a relative variationof a voltage of the vertical signal line 149 in the state of equilibriumwith respect to the reference signal line 169.

A constant offset voltage V_(ofs) is generated in the reference signalline 169 at the timing T2. The reference voltage supply unit 160supplies sweep signals through a given period from each of a pluralityof sampling timings with respect to a reset signal. When sampling of thereset signal is performed 4 times, the supply of the sweep signals isstarted at each of sampling timings T31, T33, T35, and T37 of the resetsignal. The interval of these sampling timings is d_(s1). Then, thereference voltage supply unit 160 stops the supply of the sweep signalsat timings T32, T34, T36, and T38 that are reached after a given period,which is shorter than the sampling interval, elapses from each of thesampling timings.

In addition, the timing control circuit 150 supplies a clock signal CLKto the counter 175 to cause it to count a count value through the periodin which the sweep signals are supplied (from T31 to T32, etc.), andsupply of the clock signal CLK is stopped in other periods.

The counter 175 performs down-counting through a period in which thereference voltage V_(ref) is higher than the voltage of the verticalsignal line 149 among the periods in which the sweep signals aresupplied (from T31 to T32, etc.). This is executed by means of blockingsupply of clocks to the counter caused by reversal of an output of thecomparator, or the like. For example, when the reference voltage V_(ref)is equal to or lower than the voltage of the vertical signal line 149 ata timing T31′ between the timing T31 and T32, down-counting is performedfrom the timing T31 to T31′. Since the reference voltage V_(ref) isequal to or lower than the voltage of the vertical signal line 149 fromthe timing T31′ to T32, down-counting is not performed, and the countvalue is held. In addition, since the clock signal CLK is not suppliedfrom the timing T32 to the next sampling timing T33, down-counting isnot performed and the count value is held likewise.

Down-counting is performed likewise through periods in which thereference voltage V_(ref) is higher than the voltage of the verticalsignal line 149 from a timing T33 to T34, from a timing T35 to T36, andfrom a timing T37 to T38.

In addition, the pixel circuit 140 outputs an exposure signal at atiming T4 at which electric charge is transferred to the detection node144. Furthermore, at this timing T4, the timing control circuit 150causes the counting operation of the counter 175 to be switched fromdown-counting to up-counting using a switch instruction signal SW.

The reference voltage supply unit 160 supplies sweep signals through agiven period from each of a plurality of sampling timings with respectto the exposure signal. When sampling of the exposure signal isperformed 4 times, supply of the sweep signals is started at samplingtimings T51, T53, T55, and T57 of the exposure signal. The interval ofthese sampling timings is d_(s2). In addition, the reference voltagesupply unit 160 stops the supply of the sweep signals at timings T52,T54, T56, and T58 that are reached after a given period has elapsed fromthese sampling timings.

Here, if an amount of change of the sweep signals is set to a sweepamount, the sweep amount at the time of sampling of the exposure signalis set to a value greater than that at the time of sampling of the resetsignal.

The counter 175 performs up-counting through a period in which thereference voltage V_(ref) is higher than the voltage of the verticalsignal line 149 in the periods in which the sweep signals correspondingto the exposure signal are supplied (from T51 to T52, etc.).

The count value CNT is a summed value of all count values of theplurality of times of down-counting at a timing T38 at which the finalsampling for the reset signal is finished. For example, the absolutevalues of the count values in the 1^(st), 2^(nd), 3^(rd) and 4^(th)times of sampling for the reset signal are set to D_(s1-1), D_(s1-2),D_(s1-3), and D_(s1-4), respectively. In this case, the count value CNTat the timing T38 is an initial value of−D_(s1-1)−D_(s1-2)−D_(s1-3)−D_(s1-4). Note that D_(s1-1), D_(s1-2),D_(s1-3), and D_(s1-4) are examples of the first digital signaldescribed in the claims.

In addition, since the operation is switched to up-counting from thetiming T4, the count value CNT is the difference between the summedvalue of down-counting and the summed value of up-counting at the timingT58 at which the final sampling for the exposure signal is finished. Forexample, the absolute values of the 1^(st), 2^(nd), 3^(rd), and 4^(th)times of sampling for the exposure signal are set to D_(s2-1), D_(s2-2),D_(s2-3), and D_(s2-4), respectively. In this case, the count value CNTat the timing T58 is an initial value of−D_(s1-1)−D_(s1-2)−D_(s1-3)−D_(s1-4)+D_(s2-1)+D_(s2-2)+D_(s2-3)+D_(s2-4).Note that D_(s2-1), D_(s2-2), D_(s2-3), and D_(s2-4) are examples of thesecond digital signal described in the claims.

As described above, the exposure sampling interval d_(s2) is set to beno more than twice the reset sampling interval d_(s1). Thus, it ispossible to sufficiently reduce 1/f noise whose noise power increases asa frequency becomes lower.

On the other hand, in a general single slope (accumulation type) A/Dconverter, a sweep amount in A/D conversion of a signal level is fargreater than that of a reset level, and accordingly the exposuresampling interval d_(s2) is much greater than the reset samplinginterval d_(s1). For example, the exposure sampling interval d_(s2) isset to about 10 times the reset sampling interval d_(s1). In thismanner, if sampling intervals are significantly different, it is notpossible to sufficiently remove noise components of a low frequency.

b of FIG. 5 is a diagram obtained by enlarging a part 501 of the sweepsignal of a of the same drawing. As shown in b of the drawing, thevoltage of the sweep signals decreases at a constant rate through agiven period of time (from T31 to T32, etc.) after the offset voltageV_(ofs) is generated. The decreased amount in the given periodcorresponds to a sweep amount ΔV_(sweep1).

FIG. 6 is a graph showing an example of a relation between a samplinginterval and noise power density according to the first embodiment.

As described above, if the exposure sampling interval ds2 is set to beno more than twice the reset sampling interval ds1, 1/f noise isreduced. The method of eliciting this numerical range will be described.First, random noise is expressed using, for example, the followingformula.

[Math.  1] $\begin{matrix}{v^{2} = {\int_{0}^{w}{{p(f)}*{{H(f)}}^{2}*{{s(\omega)}}^{2}{df}}}} & {{Formula}\mspace{14mu} 1}\end{matrix}$

In Formula 1, p(f) is a noise density of 1/f noise of the pixel circuit140, and the unit is, for example, V²/Hz. This p(f) is expressed by, forexample, the following formula.p(f)=k/f  Formula 2k in the above formula is a noise coefficient of a transistor inside thepixel circuit 140, and for example, 5.6E−10(V²) is set. f is afrequency, and the unit is, for example, hertz (Hz).

In addition, in Formula 1, H(f) is a band limiting property of thecomparator inside the detection circuit 170, and is expressed by thefollowing formula.H(f)²=1/{1+(f/f _(c))^(n)}  Formula 3

In Formula 3, f_(c) is a cutoff frequency, and the unit is, for example,hertz (Hz). n is a coefficient. When it is attempted to obtain a fittingcutoff frequency and n through a circuit simulation of the single slope(accumulation type) A/D converter, for example, 3.24 megahertz (MHz) isobtained as the cutoff frequency f_(c), and 3.9 is obtained as n.

In addition, in Formula 1, s( ) indicates an amplitude of noise. Noiseis assumed to be a sine wave to obtain this amplitude, and the number oftimes of sampling of respective reset signals and exposure signals isset to 2. Furthermore, the interval between the final sampling of thereset signal and the first sampling of the exposure signal is set to bethe same as d_(s1). In this case, if the phase of the first samplingtiming of the reset signal is set to t, the phase of the second samplingtiming of the reset signal is t+d_(s1). In addition, the phase of thefirst sampling timing of the exposure signal is t+2d_(s1), and the phaseof the second sampling timing of the exposure signal ist+2d_(s1)+d_(s2). Thus, displacement (t) of the noise is obtainedthrough the following formula.

[Math. 2]y(t)=[cos(ωt)+cos {ω(t+d _(s1))}−cos {ω(t+2d _(s1))}−cos {ω(t+2d _(s1)+d _(s2))}]/2   Formula 4

Here, an angular frequency is expressed by the following formula.

[Math. 3]ω=2π·f  Formula 5

In addition, if Formula 4 is expressed in a complex notation in a polarform, the following formula is obtained.

[Math. 4]y=(1+e ^(jωd) ^(s1) −e ^(jω2d) ^(s1) −e ^(jω(2d) ^(s1) ^(+d) ^(s2)⁾)/2  Formula 6

If Formula 6 is converted from the polar form to a rectangular form, thefollowing formula is obtained.

   [Math.  5]  $\begin{matrix}\begin{matrix}{y = \lbrack {1 + {\cos( {\omega\; d_{s\; 1}} )} + {j \cdot {\sin( {\omega\; d_{s\; 1}} )}} - {\cos( {\omega\; 2\; d_{s\; 1}} )} -} } \\{{{j \cdot \sin}( {\omega\; 2\; d_{s\; 1}} )} - {\cos\{ {\omega( {{2\; d_{s\; 1}} + d_{s\; 2}} )} \}} -} \\{ {{j \cdot \sin}\{ {\omega( {{2\; d_{s\; 1}} + d_{s\; 2}} )} \}} \rbrack/2} \\{= \{ {1 + {\cos( {\omega\; d_{s\; 1}} )} - {\cos( {\omega\; 2\; d_{s\; 1}} )} -} } \\{{ {\cos( {{\omega\; 2\; d_{s\; 1}} + {\omega\; d_{s\; 2}}} )} \}/2} +} \\{j \cdot \{ {{\sin( {\omega\; d_{s\; 1}} )} - {\sin( {\omega\; 2\; d_{s\; 1}} )} -} } \\{ {\sin( {{\omega\; 2\; d_{s\; 1}} + {\omega\; d_{s\; 2}}} )} \}/2}\end{matrix} & {{Formula}\mspace{14mu} 7}\end{matrix}$

The sum of squares of the real terms and imaginary terms of Formula 7 isthe square of an amplitude. Thus, the amplitude is expressed by thefollowing formula.

[Math. 6]s(ω)²=[1+cos(ωd _(s1))−cos(2ωd _(s1))−cos {ω(2d _(s1) +d_(s2))}]/4+[(sin(ωd _(s1))−sin(2ωd _(s1))−sin {ω(2d _(s1) +d_(s2))}]²/4  Formula 8

In addition, when the number of times of sampling of the reset signaland the exposure signal is 4, if the phase of the first sampling timingof the reset signal is set to t, the phase of the second sampling timingof the reset signal is t+d_(s1). In addition, the phases of the 3^(rd)and 4^(th) sampling timings of the reset signal are t+2d_(s1) andt+3d_(s1). The phases of the 1^(st), 2^(nd), 3^(rd) and 4^(th) samplingtimings of the exposure signal are t+4d_(s1), t+4d_(s1)+d_(s2),t+4d_(s1)+2d_(s2), and t+4d_(s1)+3d_(s2). Thus, displacement y(t) of thenoise at this time is obtained through the following formula.

     [Math.  7] $\begin{matrix}{{y(t)} = \{ {{\cos( {\omega\; t} )} + {\cos\{ {\omega( {t + d_{s\; 1}} )} \}} + {\cos\{ {\omega( {t + {2\; d_{s\; 1}}} )} \}} + {\cos\{ {\omega( {t + {3\; d_{s\; 1}}} )} \}} - {\cos\{ {\omega( {t + {4\; d_{s\; 1}}} )} \}} - {\cos\{ {\omega( {t + {4\; d_{s\; 1}} + d_{s1}} )} \}} - {\cos\{ {\omega( {t + {4\; d_{s\; 1}} + {2\; d_{s\; 1}}} )} \}} - {\cos{\{ {\omega( {t + {4\; d_{s\; 1}} + {4\; d_{s2}}} )} \}/4}}} } & {{Formula}\mspace{14mu} 9}\end{matrix}$

If Formula 9 is expressed in a complex notation in a polar form, thefollowing formula is obtained.

[Math. 8]y=(1+e ^(jωd) ^(s1) +e ^(jω2d) ^(s1) +e ^(jω3d) ^(s2) −e ^(jω4d) ^(s2)−e ^(jω(4d) ^(s1) ^(+d) ^(s2) ⁾ −e ^(jω(4d) ^(s1) ^(+2d) ^(s2) ⁾ −e^(jω(4d) ^(s1) ^(+3d) ^(s2) ⁾)/4  Formula 10

If Formula 10 is converted from the polar form to a rectangular form,the following formula is obtained.

$\begin{matrix}{\lbrack {{Math}.\mspace{14mu} 9} \rbrack y = \{ {1 + {\cos( {\omega\; d_{s\; 1}} )} + {\cos( {\omega\; 2\; d_{s\; 1}} )} + {\cos( {\omega\; 3\; d_{s\; 1}} )} - {\cos( {\omega\; 4d_{s\; 1}} )} - {\cos( {{\omega\; 4d_{s\; 1}} + {\omega\; d_{s\; 2}}} )} - {\cos( \;{{\omega\; 4d_{s\; 1}} + {\omega\; 2\; d_{s\; 2}}} )} - {{\cos( {{{\omega 4}\; d_{s\; 1}} + {\omega\; 3\; d_{s\; 2}}} \}}/2} + {j \cdot \{ {( {{\sin( {\omega\; d_{s\; 1}} )} + {\sin( \;{\omega\; 2d_{s\; 1}} )} + {\sin( \;{\omega\; 3d_{s\; 1}} )} - {\sin( \;{{\omega 4}\; d_{s\; 1}} )} - {\sin( \;{{{\omega 4}\; d_{s\; 1}} + {\omega\; d_{s\; 2}}} )} - {\sin( {{{\omega 4}\; d_{s\; 1}} + {\omega\mspace{11mu} 2d_{s\; 2}}} )} - {\sin( {{{\omega 4}\; d_{s\; 1}} + {\omega\mspace{11mu} 3d_{s\; 2}}} )}} \}/2} }} } & {{Formula}\mspace{14mu} 11}\end{matrix}$

The sum of squares of the real terms and imaginary terms of Formula 11is the square of an amplitude. Thus, the amplitude is expressed by thefollowing formula.

[Math.  10] $\begin{matrix}{{s(\omega)}^{2} = {{\lbrack {1 + {\cos( {\omega\; d_{s\; 1}} )} + {\cos( {\omega\; 2\; d_{s\; 1}} )} + {\cos( {\omega\; 3\; d_{s\; 1}} )} - {\cos( {\omega\mspace{11mu} 4d_{s\; 1}} )} - {\cos\{ {\omega( {{4d_{s\; 1}} + d_{s\; 2}} )} \}} - {\cos\{ {\omega( {{4d_{s\; 1}} + {2d_{s\; 2}}} )} \}} - {\cos\{ {\omega( {{4d_{s\; 1}} + {3d_{s\; 2}}} )} \}}} \rbrack/4} + {\quad\lbrack {{\sin( {\omega\; d_{s\; 3}} )} + {\sin( {{\omega 2}\; d_{s\; 3}} )} + {\sin( {\omega\; 3\; d_{s\; 3}} )} - {\sin( {\omega\; 4\; d_{s\; 1}} )} - {\sin\{ {\omega( {{4d_{s\; 1}} + d_{s\; 2}} )} \}} - {\sin\{ {\omega( {{4d_{s\; 1}} + {2d_{s\; 2}}} )} \}} - { \quad{\sin\{ {\omega( {{4d_{s\; 1}} + {3d_{s\; 2}}} )} \}} \rbrack^{2}/4}} }}} & {{Formula}\mspace{14mu} 12}\end{matrix}$

If specific numerical values are set for the sampling intervals d_(s1)and d_(s2) and the right side of Formula 8 or Formula 12 is substitutedinto Formula 1, noise power density when the number of times of samplingis 2 or 4 is calculated. A graph in which noise power density calculatedby fixing the reset sampling interval d_(s1) to 4 microseconds (μs) andchanging the exposure sampling interval d_(s2) to 1 to 40 microseconds(μs) is shown in FIG. 6. In the drawing, the vertical axis representsnoise power density of 1/f noise, and the horizontal axis representsexposure sampling intervals. The dot-and-dash line indicates a propertywhen the number of times of sampling of the respective reset signal andexposure signal is 2, and the solid line indicates a property when thenumber of times of sampling is 4.

As exemplified in FIG. 6, as the exposure sampling interval d_(s2)becomes longer, the noise power density increases. In order to set thenoise power density to a tolerance value or lower, it is necessary toset the exposure sampling interval d_(s2) to 8 microseconds (i.e., twiced_(s1)) or shorter. In particular, it is desirable to set the exposuresampling interval d_(s2) to 3 to 8 microseconds (i.e., 0.7 to 2.0 timesd_(s1)). If d_(s2) is set to 0.7 to 2.0 times d_(s1), for example, aneffect of noise reduction of 5% or more is obtained when sampling isperformed 4 or more times. In addition, it is more desirable to setd_(s2) to be 0.7 to 1.5 times d_(s1). Furthermore, it is most desirableto set d_(s2) to be the same as d_(s1).

In addition, as the number of times of sampling increases, the noisepower density becomes lower. The number of times of sampling of therespective reset signal and exposure signal is desirably 4 times ormore.

Furthermore, although the number of times of sampling of the resetsignal is set to be the same as the number of times of sampling of theexposure signal, the number may be different.

FIG. 7 is a graph showing an example of a relation between frequenciesand noise power density according to the first embodiment. The verticalaxis of the drawing represents noise power density, and the horizontalaxis represents frequency. In addition, the solid line indicates aproperty of all noise after sampling, and the dot-and-dash lineindicates a property of 1/f noise included in the noise. As shown in thedrawing, as the frequency becomes lower, the noise power density of 1/fnoise increases. Noise other than the 1/f noise is effectively removedthrough correlated double sampling in which the exposure samplinginterval d_(s2) is set to be no more than twice the reset samplinginterval d_(s1) as described above.

According to the first embodiment of the present technology, the resetsignal is sampled at the interval d_(s1), and the exposure signal issampled at the interval d_(s2) that is no more than twice the intervald_(s1) as described above, and thus noise of low frequencies can beeffectively removed.

[First Modified Example]

In the first embodiment, a sweep amount corresponding to an exposuresignal is set to be greater than a sweep amount corresponding to a resetsignal. However, in applications of radiation counting or fluorescencedetection using scintillation, illuminance of scintillation light isvery low in most cases. In addition, there are cases in applications ofdigital still cameras and surveillance cameras in which illuminance ofnatural light is very low as well, such as at night. When illuminance isvery low as described, there are cases in which a level of an exposuresignal is equal to or lower than a level of offset noise generated inthe comparator 174. In such a case, it is desirable to set a sweepamount corresponding to an exposure signal to the same value as a sweepamount corresponding to a reset signal. Accordingly, accuracy inphotodetection can be raised. An image sensor 100 according to a firstmodified example is different from that of the first embodiment in thata sweep amount corresponding to an exposure signal is set to the samevalue as a sweep amount corresponding to a reset signal.

FIG. 8 is a timing chart showing an example of an operation of the imagesensor according to the first modified example of the first embodiment.As exemplified in the drawing, a sweep amount corresponding to anexposure signal is set to be the same value as a sweep amountΔV_(sweep1) corresponding to a reset signal. Only zero to a few photonsare incident on each pixel circuit 140 in an environment with ultra-lowilluminance, and it is desirable in such an environment to actively usethe sequence of the drawing.

Since the sweep amount of a sweep signal corresponding to the resetsignal is set to be substantially the same as the sweep amount of asweep signal corresponding to the exposure signal according to the firstmodified example as described above, even when the level of the exposuresignal is very low, light can be detected with high accuracy.

[Second Modified Example]

Although the counter 175 switches its operation from down-counting toup-counting when exposure is finished in the first embodiment, only oneof up-counting and down-counting may be performed without switching. Animage sensor 100 of a second modified example is different from that ofthe first embodiment in that a counter performs only one of up-countingand down-counting.

FIG. 9 is a diagram showing an example of a configuration of a detectioncircuit 170 according to the second modified example of the firstembodiment. The detection circuit 170 of the second modified example isdifferent from that of the first embodiment in that the circuit includesa counter 178 in place of the counter 175, and a switch 181, a register182, and a subtracter 183.

The counter 178 has a configuration similar to the counter 175 of thefirst embodiment except that only one of up-counting and down-countingis performed. The counter 178 supplies a count value CNT to the switch181.

The switch 181 switches an output destination of a count value CNTaccording to a switch instruction signal SW. This switch 181 supplies acount value CNT1 to the register 182 before a timing T4 at which anexposure period ends, and supplies a count value CNT2 to the subtracter183 from the timing T4. The register 182 holds the count value CNT1.This count value CNT1 is an integrated value of digital signalsconverted from reset values (initial value of+D_(s1-1)+D_(s1-2)+D_(s1-3)+D_(s1-4), etc.).

The subtracter 183 subtracts one of the count value CNT2 from the switch181 and the count value CNT1 held in the register 182 from the other.The subtracter 183 supplies the subtraction result to the dividercircuit 176.

Note that, although the counter 178 integrates count values of aplurality of times of sampling, the counter may not perform suchintegration. In that case, an integrator circuit may be further providedin the detection circuit 170. The counter 178 counts count values fromthe initial value at each sampling timing such as a timing T31 andsupplies the values to the integration circuit, and the integrationcircuit integrates the count values and supplies the result to theswitch 181.

Since the counter performs only one of up-counting and down-countingaccording to the second modified example as described above, a counterwith a simpler circuit configuration than a counter that switches toboth modes can be used.

<1. Second Embodiment>

Although the image sensor 100 is used for photon detection in the firstembodiment, the image sensor 100 can also be used for radiationcounting. The second embodiment is different from the first embodimentin that the image sensor 100 is used for radiation counting.

FIG. 10 is a whole diagram showing an example of a configuration of aradiation counting device according to the second embodiment. Theradiation counting device has a plurality of scintillators 200 and asemiconductor device 101. The semiconductor device 101 is provided withthe image sensor 100 of the first embodiment and a digital processingunit (not illustrated).

The scintillators 200 are scintillators processed in pillar shapes orfiber shapes, and is disposed at a pitch of 1 millimeter (mm), forexample. Each of the scintillator 200 is isolated by a partition whichreflects light so that scintillation light is confined therein.

In the semiconductor device 101, a pixel array unit 130 is logicallydivided into 1-square-millimeter (mm²) regions corresponding to thescintillators 200. By connecting the scintillator 200 and the imagesensor 100, the scintillation light generated in the scintillators 200is selectively radiated to the corresponding compartments in the pixelarray unit 130, and then the light amount is measured.

The digital processing unit in the semiconductor device 101 classifiesenergy of incident radiation based on the light emission amount of thescintillators 200 and measures the incident frequency based on thenumber of times of the light emission.

For example, when it is assumed that the size of each pixel of thesemiconductor device 101 is about 4×4 square micrometers (μm²), 250×250(=62,500) pixel circuits 140 are included in the compartments of thepixel array unit 130. Determination of a light amount is elicited bytotalizing pixel outputs of the compartments. Each pixel output may be agrayscale-determined value such as one with 10 bits, and when randomnoise is suppressed to be sufficiently smaller than one photon signal,it may be a binary determination value threshold-determined based onpresence of incidence of photons.

For each scintillator 200, for example, a cerium doped lutetium yttriumorthosilicate (LYSO:Ce) is used. In this case, the light emission amountwhen gamma rays of 662 keV enter is about 10,000 photons, and thereforethe light receiving amount of each pixel is 0 photon or 1 photon in manycases. Random noise of each pixel is added thereto.

In the gradation determination, it is desirable for the minimumresolution (least significant bit value or LSB) to be sufficientlysmaller than 1 photon, and thus the total noise amount is maintained ina stable range. For example, when random noise of each pixel is aboutone electron signal (rms), the total of the pixel noise of thecompartments is about 250 electron signals (rms).

Such a radiation counting device can be used alone for detection ofradioactive contamination or cosmic rays as a dosimeter. Furthermore, ifa blank portion of the semiconductor device 101 is minimized byutilizing a stacked structure and detectors can be laid in an arrayshape, the radiation counting device can be used for two-dimensionalimaging of radiations, like a gamma camera.

Note that the digital processing unit may change a sweep amount ofsampling of an exposure signal according to a radiation incidencefrequency. For example, when a radiation incidence frequency is higherthan a give value, the digital processing unit may set to the sweepamount exemplified in FIG. 5, and when it is not, the unit may switch toa sweep amount for low illuminance exemplified in FIG. 8.

As described above, according to the second embodiment, the radiationcounting device samples reset signals at the interval d_(s1) and samplesexposure signal of weak light at the interval d_(s2) that is no morethan twice the interval d_(s1), and thus noise of low frequencies can beremoved and thereby weak light can be detected. Accordingly, theradiation counting device can count radiations from the detectionresult.

The above-described embodiments are examples for embodying the presenttechnology, and matters in the embodiments each have a correspondingrelationship with disclosure-specific matters in the claims. Likewise,the matters in the embodiments and the disclosure-specific matters inthe claims denoted by the same names have a corresponding relationshipwith each other. However, the present technology is not limited to theembodiments, and various modifications of the embodiments may beembodied in the scope of the present technology without departing fromthe spirit of the present technology.

The processing sequences that are described in the embodiments describedabove may be handled as a method having a series of sequences or may behandled as a program for causing a computer to execute the series ofsequences and as a recording medium storing the program. As therecording medium, a compact disc (CD), a MiniDisc (MD), and a digitalversatile disc (DVD), a memory card, and a Blu-ray disc (a registeredtrademark) can be used.

In addition, the effects described in the present specification are notlimiting but are merely examples, and there may be additional effects.

Additionally, the present technology may also be configured as below.

-   (1)

A semiconductor photodetection device including:

a pixel circuit configured to generate a reset signal of a predeterminedinitial voltage and an exposure signal of a signal voltage according toan exposure amount of light in order;

an analog-digital conversion unit configured to perform a reset samplingprocess of converting the reset signal into a first digital signal at apredetermined reset sampling interval and an exposure sampling processof converting the exposure signal into a second digital signal at anexposure sampling interval that does not exceed twice the predeterminedreset sampling interval in order; and

a detection unit configured to detect the light based on the firstdigital signal and a second digital signal.

-   (2)

The semiconductor photodetection device according to (1), wherein theexposure sampling interval is a value that is 0.7 to 2.0 times the resetsampling interval.

-   (3)

The semiconductor photodetection device according to (2), wherein theexposure sampling interval is a value that is 0.7 to 1.5 times the resetsampling interval.

-   (4)

The semiconductor photodetection device according to (3), wherein theexposure sampling interval is a substantially identical value as thereset sampling interval.

-   (5)

The semiconductor photodetection device according to any one of (1) to(4), wherein

-   -   the analog-digital conversion unit includes:        -   a comparison unit configured to perform a process of            comparing a voltage of a first sweep signal whose voltage            changes at a constant rate after a timing of sampling of the            reset signal elapses and a voltage of the reset signal, and            a process of comparing a voltage of a second sweep signal            whose voltage changes at a constant rate after a timing of            sampling of the exposure signal elapses and a voltage of the            reset signal in order; and        -   a counter configured to count a count value according to a            result obtained by the comparison performed by the            comparison unit and supply a signal of the count value as            the digital signal, and    -   amounts of change of the respective first sweep signal and        second sweep signal are identical.

-   (6)

The semiconductor photodetection device according to any one of (1) to(5), wherein the analog-digital conversion unit converts the resetsignal into the first digital signal a number of times more than threetimes, and converts the exposure signal into the second digital signal anumber of times more than three times.

-   (7)

The semiconductor photodetection device according to any one of (1) to(6), wherein the detection unit detects the light based on thedifference between the first digital signal and the second digitalsignal.

-   (8)

The semiconductor photodetection device according to (7), wherein thedetection unit detects the light based on whether a value according tothe difference exceeds a predetermined threshold value.

-   (9)

The semiconductor photodetection device according to (7), wherein thedetection unit calculates a statistic of the difference as a detectionresult of the light.

-   (10)

A radiation counting device including:

a scintillator configured to emit scintillation light when a radiationenters;

a pixel circuit configured to generate a reset signal of a predeterminedinitial voltage and an exposure signal of a signal voltage according toan exposure amount of the scintillation light;

an analog-digital conversion unit (171) configured to perform a resetsampling process of converting the reset signal into a first digitalsignal at a predetermined reset sampling interval and an exposuresampling process of converting the exposure signal into a second digitalsignal at an exposure sampling interval that does not exceed twice thepredetermined reset sampling interval in order; and

a detection unit (177) configured to detect the light based on the firstdigital signal and the second digital signal.

-   (11)

A method of controlling a semiconductor photodetection device, themethod including:

a signal generation step of a pixel circuit generating a reset signal ofa predetermined initial voltage and an exposure signal of a signalvoltage according to an exposure amount of light;

an analog-digital conversion step of an analog-digital conversion unitperforming a reset sampling process of converting the reset signal intoa first digital signal at a predetermined reset sampling interval and anexposure sampling process of converting the exposure signal into asecond digital signal at an exposure sampling interval that does notexceed twice the predetermined reset sampling interval in order; and

a detection step of a detection unit detecting the light based on thefirst digital signal and the second digital signal.

REFERENCE SIGNS LIST

-   100 image sensor-   101 semiconductor device-   110 constant current circuit-   111 MOS transistor-   120 row drive circuit-   130 pixel array unit-   140 pixel circuit-   141 photodiode-   142 accumulation node-   143 transfer transistor-   144 detection node-   145 reset transistor-   146 amplifier transistor-   147 selection transistor-   150 timing control circuit-   160 reference voltage supply unit-   170 detection circuit-   171 A/D conversion circuit-   172, 173 capacitor-   174 comparator-   175, 178 counter-   176 divider circuit-   177 determination circuit-   181, 185 switch-   182 register-   183 subtracter-   190 output circuit-   200 scintillator

What is claimed is:
 1. A semiconductor photodetection device comprising:a pixel circuit configured to generate a reset signal of a predeterminedinitial voltage and an exposure signal of a signal voltage according toan exposure amount of light in order; an analog-digital conversion unitconfigured to perform a reset sampling process of converting the resetsignal into a first digital signal at a predetermined reset samplinginterval and an exposure sampling process of converting the exposuresignal into a second digital signal at an exposure sampling intervalthat does not exceed twice the predetermined reset sampling interval inorder, wherein the analog-digital conversion unit comprises: acomparison unit configured to compare a voltage of a first sweep signalwhose voltage changes at a first constant rate after a first pulseperiod elapses with a voltage of the reset signal, and compare a voltageof a second sweep signal whose voltage changes at a second constant rateafter a second pulse period elapses with a voltage of the exposuresignal in order; and a counter configured to count a count valueaccording to a result obtained by the comparisons performed by thecomparison unit and to supply a signal of the count value; and adetection unit configured to detect the light based on the signal of thecount value.
 2. The semiconductor photodetection device according toclaim 1, wherein the exposure sampling interval is a value that is 0.7to 2.0 times the reset sampling interval.
 3. The semiconductorphotodetection device according to claim 1, wherein the exposuresampling interval is a value that is 0.7 to 1.5 times the reset samplinginterval.
 4. The semiconductor photodetection device according to claim1, wherein the exposure sampling interval is a substantially identicalvalue as the reset sampling interval.
 5. The semiconductorphotodetection device according to claim 1, wherein amounts of change ofthe first sweep signal and second sweep signal are identical.
 6. Thesemiconductor photodetection device according to claim 1, wherein theanalog-digital conversion unit converts the reset signal into the firstdigital signal a number of times more than three times, and converts theexposure signal into the second digital signal a number of times morethan three times.
 7. The semiconductor photodetection device accordingto claim 1, wherein the detection unit detects the light based on adifference between the first digital signal and the second digitalsignal.
 8. The semiconductor photodetection device according to claim 7,wherein the detection unit detects the light based on whether a valueaccording to the difference exceeds a predetermined threshold value. 9.The semiconductor photodetection device according to claim 7, whereinthe detection unit calculates a statistic of the difference as adetection result of the light.
 10. The semiconductor photodetectiondevice according to claim 1, wherein the counter decreases the countvalue based on the comparison of the voltage of the first sweep signalwith the voltage of the reset signal, and wherein the counter increasesthe count value based on the comparison of the voltage of the secondsweep signal with the voltage of the exposure signal.
 11. A radiationcounting device comprising: a scintillator configured to emitscintillation light when a radiation enters; a pixel circuit configuredto generate a reset signal of a predetermined initial voltage and anexposure signal of a signal voltage according to an exposure amount ofthe scintillation light; an analog-digital conversion unit configured toperform a reset sampling process of converting the reset signal into afirst digital signal at a predetermined reset sampling interval and anexposure sampling process of converting the exposure signal into asecond digital signal at an exposure sampling interval that does notexceed twice the predetermined reset sampling interval in order, whereinthe analog-digital conversion unit comprises: a comparison unitconfigured to compare a voltage of a first sweep signal whose voltagechanges at a first constant rate after a timing of sampling of the resetsignal elapses with a voltage of the reset signal, and compare a voltageof a second sweep signal whose voltage changes at a second constant rateafter a timing of sampling of the exposure signal elapses with a voltageof the reset signal in order; and a counter configured to count a countvalue according to a result obtained by the comparisons performed by thecomparison unit and to supply a signal of the count value; and adetection unit configured to detect the light based on the signal of thecount value.
 12. The radiation counting device according to claim 11,wherein the counter decreases the count value based on the comparison ofthe voltage of the first sweep signal with the voltage of the resetsignal, and wherein the counter increases the count value based on thecomparison of the voltage of the second sweep signal with the voltage ofthe exposure signal.
 13. A method of controlling a semiconductorphotodetection device, the method comprising: a signal generation stepof a pixel circuit generating a reset signal of a predetermined initialvoltage and an exposure signal of a signal voltage according to anexposure amount of light; an analog-digital conversion step of ananalog-digital conversion unit performing a reset sampling process ofconverting the reset signal into a first digital signal at apredetermined reset sampling interval and an exposure sampling processof converting the exposure signal into a second digital signal at anexposure sampling interval that does not exceed twice the predeterminedreset sampling interval in order, wherein the analog-digital conversionunit comprises: a comparison unit configured to compare a voltage of afirst sweep signal whose voltage changes at a first constant rate aftera timing of sampling of the reset signal elapses with a voltage of thereset signal, and compare a voltage of a second sweep signal whosevoltage changes at a second constant rate after a timing of sampling ofthe exposure signal elapses with a voltage of the reset signal in order;and a counter configured to count a count value according to a resultobtained by the comparisons performed by the comparison unit and tosupply a signal of the count value; and a detection step of a detectionunit detecting the light based on the signal of the count value.
 14. Themethod according to claim 13, wherein the counter decreases the countvalue based on the comparison of the voltage of the first sweep signalwith the voltage of the reset signal, and wherein the counter increasesthe count value based on the comparison of the voltage of the secondsweep signal with the voltage of the exposure signal.